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The Design of Direct Memory Access Controller Core Based on Advanced Microcontroller Bus Architecture

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dc.contributor.author Yuniarto, Wendhi
dc.contributor.author Syamsudin, Mariana
dc.contributor.author Suharto, Irawan
dc.date.accessioned 2023-05-11T18:41:43Z
dc.date.available 2023-05-11T18:41:43Z
dc.date.issued 2023-05-12
dc.identifier.uri http://repository.polnep.ac.id/xmlui/handle/123456789/2135
dc.description.abstract Direct Memory Access Controller (DMAC) is a module to support the system’s performance in order to access one or more CPU/signal processors and multiple peripherals. The system uses the Advanced Microcontroller Bus Architecture (AMBA), specification defines a communication standard on-chip designed by ARM (Advanced RISC Machines). AMBA AHB is used for high performance systems, high clock frequency, and as well as to support sufficient processor, on-chip memories, and off-chip external memory interfaces. Moreover, it allows the access to high bandwidth on the memory device chip. This system is integrated with a RISC processor and its memory controller SIEGE32 in system on chip (SoC). The verification process is using ModelSim simulation that aims to ensure the system’s functionality and compatibility and allow data transfer between cores in the SoC. The final stage are the synthesis and layout design by using CAD tools synopsis with 0:18 m CMOS technology design analyzer and Astro. The implementation of chip layout produces a maximum clock frequency of 26.5 MHz and the chip area of 0.41 mm2. en_GB
dc.subject Peripheral en_GB
dc.subject processor en_GB
dc.subject DMAC en_GB
dc.subject AMBA en_GB
dc.subject SoC en_GB
dc.title The Design of Direct Memory Access Controller Core Based on Advanced Microcontroller Bus Architecture en_GB


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